Physical Design Methodology Lead

About the role

We are seeking a senior-level Flow and Methodology Engineer to lead backend design automation for advanced process node SoC and ASIC implementation. This role focuses on enabling robust, scalable, and production-ready RTL-to-GDS flows across synthesis, floorplanning, place and route, clock tree synthesis, static timing analysis, power grid implementation, extraction, physical verification, and signoff closure.

What you'll do

• Own, develop, and continuously improve backend RTL-to-GDS implementation flows for advanced process nodes, with emphasis on quality of results, scalability, runtime
• Drive methodology development across place and route, CTS, timing closure, congestion analysis, ECO implementation, power grid design, IR/EM analysis, extraction
• Partner with design, architecture, DFT, verification, timing, low-power, package, foundry
• Lead initiatives from concept and feasibility assessment through prototype development, benchmarking, validation, documentation, deployment, training
• Establish repeatable best practices, reference flows, automation frameworks, dashboards, and metrics to improve PPA, reduce turnaround time

What you need

• 15–27 yrs of experience
• VLSI
• Python
• Travel booking
• Shell scripting
• Perl
• Machine learning
• B.Tech or B.E.