Senior GPU Floorplan Design Engineer

About the role

This role sits at the intersection of architecture, RTL, performance analysis, and physical design, with a strong focus on path forward, early planning, feasibility studies, and physical trade-off exploration.

What you'll do

• Working with architects, design leads, physical design leads and package leads, you will develop and to craft and optimize floorplans during early chip development
• Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities
• Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical implementation decisions
• Build tools and improve existing infrastructure to optimize chip area and speed of execution
• A deep hardware engineering background with a concentration in VLSI and/or Computer Architecture

What you need

• 5–9 years in electrical & electronics
• VLSI
• Verilog
• Power systems
• C++
• Python
• C
• B.Tech or B.E. or M.Tech

Good to have

• Perl