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Senior Layout Design Engineer

Synopsys (incl. Ansys)·Noida

Pay not stated3–6 yrsFull-time

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About the role

Senior Layout Design Engineer at Synopsys (incl. Ansys). Design and own full custom analog layouts for GPIO, specialty IO, and general-purpose analog IP blocks including I2C, I3C, SMBUS, eMMC, SVID, Quad SPI.

What you'll do

  • Design and own full custom analog layouts for GPIO, specialty IO, and general-purpose analog IP blocks including I2C, I3C, SMBUS, eMMC, SVID, Quad SPI
  • Develop high-performance LVDS layouts and crystal oscillator circuits with attention to signal integrity, noise coupling, and parasitic management
  • Collaborate with circuit designers to translate schematics into physical implementations that meet area, performance, matching, and reliability specifications
  • Perform layout verification including DRC, LVS, and parasitic extraction analysis, iterating with design teams to close on performance targets
  • Build and maintain layout automation scripts to improve design efficiency, consistency, and quality across IP families

What you need

  • 3–6 yrs of experience
  • VLSI
  • Python
  • Perl
  • B.Tech or B.E. or M.Tech

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