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Sr. Design Engineer / Assistant Manager - Radar Signal Processing (JD#RSP01)

Larsen & Toubro·Mumbai

Pay not stated3–6 yrsFull-time
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About the role

India, Maharashtra, L&T Innovation Campus, Powai

What you'll do

  • Algorithm development, simulation & implementation using Vivado / Matlab / Python
  • Radar Subsystem integration & testing
  • Embedded Hardware & Firmware development using FPGA / DSP / Microcontroller
  • High-speed ADC, DAC, DDR, 1G/10G Ethernet and other peripheral interface designs with FPGA

What you need

  • 3–6 yrs of experience
  • MATLAB
  • FPGA
  • Verilog
  • Embedded C
  • Python
  • C++
  • B.Tech or B.E. or M.Tech

Good to have

  • C
  • Circuit design

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