Staff Engineer, Design Verification - High-Speed Interface IP

About the role

Staff Engineer, Design Verification - High-Speed Interface IP at Synopsys (incl. Ansys). Develop and execute verification strategies for complex ASIC and digital IP designs.

What you'll do

• Develop and execute verification strategies for complex ASIC and digital IP designs
• Build, enhance, and maintain verification environments for high-speed digital interfaces
• Develop test plans, test cases, stimulus, checkers, and coverage models to achieve verification objectives
• Verify functionality of designs involving high-speed protocols, particularly PCI/PCIe and USB
• Debug simulation failures and collaborate with RTL design engineers to identify and resolve functional issues

What you need

• 5–6 yrs of experience
• VLSI
• Verilog
• Test cases
• Any graduate